The present application relates generally to laser trimming and more specifically to laser programming.
Laser trimming is used in many manufacturing processes to trim the value of a resistive element, or to program a device or integrated. In arrays, rows and column are to be programmed as well as redundant rows and columns as for example in SRAM. Where the specific value to be stored in the rows and columns is well known, laser trimming can be performed at earlier stages of the process. Similarly if resistors or resistive elements are at a higher level in the integrated circuit, it is readily assessable for laser trimming at the test stage. Wherein the programming involves lower levels of resistors or rows and columns wherein the programming must be performed at the test stage, a very thick oxide is present over the area to be programmed or laser trimmed.
For example, polycrystalline fuses may be covered by as much as 3 microns of oxide. For a YAG laser, the thickness of oxide through which it can penetrate to perform laser trimming should not exceed 1 micron. Thus the oxide over the area to be laser trimmed must be thinned to below 1 micron. The variation with the thickness must also not vary more than 10%. Thus for example, a 7,000 angstrom thickness would vary plus or minus 700 angstroms. This stringent requirement eliminates the possibility of a timed fuse window oxide etch above the fuse because the field oxide between the area to be fused and a first level metal, the dielectric between the first and second levels of interconnects and the pacification layer deposition and etch sigmas are too great. The three sigma variability of the oxide thicknesses over the area to be laser trimmed before the fuse window oxide etch is approximately plus or minus 3,600 angstroms. Thus there exists a need for another approach other than time fuse window etch to provide a window for laser trimming in an integrated circuit.
Thus it is an object of the present invention to provide an accurate method of forming a window in the insulative layers of an integrated circuit to allow laser trimming of an area of an integrated circuit.
These and other objects are achieved by covering the area to be laser trimmed with a first insulative layer having a thickness sufficiently thin that a layer can trim the area through the first insulative layer. An etch stop of a first material is formed on the first insulative layer over the area to be trimmed and covered with a second insulative layer. A portion of the second insulative layer is etched to expose the etch stop using the first material as an etch stop. A portion of the etch stop is then removed to expose a portion of the first insulative layer juxtaposed the area to be trimmed and laser trimming is conducted through the exposed first insulative layer. The etch stop is part of a first level of interconnects made of the same material and simultaneously with the etch stop. The area to be trimmed is part of a second level of contacts and interconnects and of a second material.
A third level of interconnects is provided on the second insulative layer and is connected through vias to the first interconnect level. The vias are formed to the first interconnect level and a third interconnect material is applied before exposing and etching the etch stop. The third interconnect level is formed of a third material and the removing of at least a portion of the second etch stop to expose a portion of the first insulative layer above the area to be trimmed is performed selectively so as not to etch exposed portions of the third interconnect level. A third insulative layer may be provided over the third interconnect level and the removing of a portion of the second insulative layer to expose the etch also removes a portion of the third insulative layer.
The material of the etch stop and the first interconnect level and the material of the third interconnect level are preferably metals while the material of the area to be trimmed is a polycrystalline semiconductor on the substrate. The etch stop is formed to have a greater lateral area than the area to be trimmed and only a portion of the etch stop is removed. This prevents insulative undercutting of the second and third insulative layers.
The resulting structure is a substrate having a first material laser trimmed which is covered by a first insulative layer. The etch stop material is on the first insulative layer having a first aperture exposing the first insulative layer juxtapose the laser trimmed area. Finally a second insulative layer over the second material and the first insulative layer has a second aperture exposing the first aperture in the first material. A first level of interconnects and contacts may be provided between the substrate and the first insulative layer, a second level of interconnects may be provided between the first and second insulative layers and a third level of interconnects may be provided on the top of the second insulative layer.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.